- USA - San Jose: Application Engineers for project management. Each Engineer has layout experience of 15+ years.
- 22 member team in Bangalore that supports US design operations for maximum output.
- 24/6 Design Cycle: Day Shift in U.S., 2 shifts in India.
- Schematic Capture tools: OrCAD, Concept HDL, and PADS logic
- Design tools: Cadence Allegro 16.6, 17.2, 17.4. Mentor PADS, and Altium Designer
- SI/PI Simulation Tools: ADS and HyperLynx.
- Analog / Mixed Signal / High Speed
- Digital / RF / Microwave
- Schematic Capture with Netlist Generation
- Signal Integrity / Cross talk analysis
- Fine Pitch BGA: Multi-site .3MM & .4MM pitch BGA’s
- Micro Via / Blind & Buried Vias
- HDI Constructions
- Critical Controlled Impedance
- Component footprint library development and maintenance
- Experience across several Tester platforms: All Teradyne, Advantest, Verigy, Nextext platforms supported
Gorilla’s design experience includes semiconductor test, wafer sort/probe, HDI computer cards, backplanes, evaluation and characterization boards. Our design team has a first-hand understanding of our factory’s DFM rules and guidelines. This helps to expedite a design-to-manufacturing cycle with the focus on internal communication.